Code: AE0B38APH |
FPGA Applications |
Lecturer: Ing. Radek Sedláček Ph.D. |
Weekly load: 1P+3L |
Completion: GA |
Department: 13138 |
Credits: 5 |
Semester: W |
- Description:
-
After the short introduction into the structure and technology of programmable circuits (especially the CPLD and FPGA), the lectures are devoted to the VHDL and its usage for simulation and synthesis of digital circuits. Laboratories are focused on CPLD and FPGA circuit applications and on the use of SW instruments for programmable hardware design and simulation. Within the larger project implemented in the second part of laboratories, a complete device (system on the chip) is implemented in the FPGA or CPLD circuit. Students may choose from the list of projects or they can bring their own (even group projects are possible). Development boards with FPGA (or CPLD) are available. \\The result of the student survey of the course is here: http://www.fel.cvut.cz/anketa/aktualni/courses/AE0B38APH
- Contents:
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1. Programmable components, history, and present.
2. Introduction to VHDL language, design units.
3. Writing numbers of characters and strings.
4. Basic data types and operators.
5. Basic objects - constants, variables, signals.
6. Parallel and sequential domain.
7. Implementation of state machines.
8. Standard libraries, LPM library, and their use.
9. Procedures and functions.
10. Design of combinational and sequential circuits.
11. Tools and methods for simulation.
12. Special internal structures (RAM, PLL, multipliers) and their use.
13. Creation of user libraries.
14. SoC implementation using built-in NIOS II processor.
- Seminar contents:
-
1. Introduction in QUARTUS II, opening project
2. Logic and arithmetic functions in VHDL, programming in the parallel domain.
3. Programming in the sequential domain - processes, flip-flops, and counters.
4. Design simulation using test vectors and test benches in ModelSim.
5. State automata - variants of VHDL implementation.
6. Usage of internal RAM in projects.
7. Usage of external RAM in projects.
8. Desing of SoC based on NIOS II - example I.
9. Desing of SoC based on NIOS II - example II.
10.Work on project implementation.
11.Work on project implementation.
12.Work on project implementation.
13.Work on project implementation.
14.Final project presentation, assessment.
- Recommended literature:
-
1. Pedroni, V.A.: Digital Electronics and Design with VHDL. Morgan Kaufmann 2008, ISBN: 978-0123742704
2. Ashenden, P. J.: The Designer's guide to VHDL. Morgan Kaufmann 2008. ISBN: 978-0-12-088785-9.
- Keywords:
- VHDL language, FPGA, System on a chip, NIOS processor
Abbreviations used:
Semester:
- W ... winter semester (usually October - February)
- S ... spring semester (usually March - June)
- W,S ... both semesters
Mode of completion of the course:
- A ... Assessment (no grade is given to this course but credits are awarded. You will receive only P (Passed) of F (Failed) and number of credits)
- GA ... Graded Assessment (a grade is awarded for this course)
- EX ... Examination (a grade is awarded for this course)
- A, EX ... Examination (the award of Assessment is a precondition for taking the Examination in the given subject, a grade is awarded for this course)
Weekly load (hours per week):
- P ... lecture
- C ... seminar
- L ... laboratory
- R ... proseminar
- S ... seminar